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FM / SDR7020 / TRANSMITTER / FREE

Digital FM broadcast
transmitter

The SDR7020 is a Pluto clone with a Zynq 7020 and an AD9363, from 70 MHz to 6 GHz. With the FPGA design of Willem, PE1PCF, it becomes a complete FM transmitter: analogue MPX in, FM out, without a PC in the signal path. digiWUFFUM, the Windows software of PE1PzN, is the program that goes with it: control the transmitter and measure what really goes on air. The program itself is in Dutch.

The SDR7020 in use, with heat sinks and a connector on the GPIO header
The SDR7020 · TX1, RX1, RX2, TX2 at the top
digiWUFFUM, the rack with lamps, buttons, display and transmitter switch
digiWUFFUM · the rack: frequency, power, presets, lamps and the transmitter switch

The sound does not go through the PC. Your stereo encoder delivers an ordinary analogue MPX signal, a small I2S board close to the SDR7020 converts it, and the FPGA turns it into FM modulation. The PC only sets and measures. If the PC drops out, the SDR7020 switches the transmitter off by itself after five seconds.

NEW IN 3.2

Version 3.2 replaces 3.1. Program and SD card are both new:

NEW IN 3.1

Version 3.1 replaced 3.0:

SINCE 3.0

Since version 3.0 two things stand out:

Receiver on the own transmitter, with the panel Receiver in the 7020 (DAC) at the bottom left
Receiver · bottom left the panel Receiver in the 7020 (DAC): sound from the DAC, squelch, mono and the status with S/N and stereo
Tips for 3.2. Set the power to -4 dB and not to 0 dB: at 0 dB the AD9363 distorts more and sidebands appear. Avoid frequencies that are an exact multiple of 40 MHz, such as 1280.000 MHz: there the PLL of the AD9363 makes a small wobble. 1283 MHz, for example, is fine.
THE MODULATION MONITOR
Modulation monitor with deviation, pilot, RDS, MPX power and MPX spectrum
Modulation monitor · every meter has a target line, the number changes colour with the deviation from it

You measure your own transmitter with the SDR7020 itself, via the second receive input, or with an RSPdx. The peak deviation follows ITU-R SM.1268, the MPX power BS.412 over sixty seconds. Besides that the pilot and its exact frequency, the RDS injection, and the error of the 38 kHz subcarrier relative to twice the pilot: that almost entirely determines how good your channel separation is.

ALIGNMENT
Alignment with the test tone and the alignment aid
Alignment · image and carrier leakage live in dBc, automatically or by hand

An IQ transmitter always makes a little image and a little carrier leakage, and how much differs per frequency. With the test tone on, digiWUFFUM measures both and finds the best setting itself. The result is stored per frequency; with Band afregelen (align band) you go through a whole band in steps of 5 MHz. On 23 cm that reaches an image rejection of around 80 dB.

WHAT IS IN THE FPGA

The basis is the design of Willem, PE1PCF (on GitHub). Meanwhile I have improved and added some nice things.

Card 3.2, for transmitting and receiving:

Card 2.6, my changes:

Monitor bar with the clipper and the choice of the channel filter
Monitor bar · clipper on at 75 kHz, next to it how many dB it removes, and the choice of the channel filter
CONNECTING
Drawing of the GPIO port of the SDR7020 with the I2S connections
GPIO port · DAC (sound out) on 7, 11, 13; ADC (sound in) on 14, 16, 18

The ADC board: I2S ADC Audio Capture Card Module, 24 bit, 192 kHz, Master/Slave · for example at Amazon

ADC BOARD TO THE GPIO PORT

DATApin 14
LRCKpin 16
BCKpin 18
GNDpin 20 (and 2)
5 Vpin 1

DAC BOARD TO THE GPIO PORT (3.x)

DATA / LRCK / BCKpin 7 / 11 / 13
GND / 5 Vpin 2 / pin 1
Voltage3.3 V, direct
Format32 kHz, 24 bit, I2S, no MCLK

NOTE

Voltage14, 16, 18 are 1.8 V
Divider per line1 kΩ series, 1.2 kΩ to ground
ADC boardMaster, 24 bit, 192 kHz
MPXon the left input
Do not usepin 15, 17, 19
Voltage divider on pins 14, 16 and 18. Those pins are on an FPGA bank that runs at 1.8 V. The ADC board outputs 3.3 V; without a divider the FPGA gets too much voltage on its inputs. So put a divider in each of the three lines, as close to the GPIO port as possible:
ADC board ---[ 1 kΩ ]---+---> GPIO pin 14 / 16 / 18
                        |
                   [ 1.2 kΩ ]
                        |
                      ground
3.3 V × 1.2 / 2.2 = 1.8 V. No divider to the DAC board (pins 7, 11, 13): those pins are on the 3.3 V bank and the PCM5102A itself also runs at 3.3 V.
Without an ADC board the whole FPGA chain stands still, the test tone too: then only a little carrier leakage goes on air. So always connect the board, also for alignment.
Only for radio amateurs and radio research, not for commercial use. Everything on this page (program, files and description) is given free of charge as it is, without any warranty. Use is at your own risk: PE1PzN is not liable for damage to equipment, interference to others or other consequences of use. Transmitting is only allowed within the conditions of your own licence and on frequencies where you are allowed to; that is your own responsibility.
DOWNLOADS

Update 19 October 2026 (evening): digiWUFFUM 3.2. Replaces 3.1. Noise reduction in the receiver, no more clicks in the DAC sound, and the alignment per frequency is always applied. Works on every SDR7020, with the Zoek button and the fix for home networks with 192.168.2.x. Always update program and SD card together: program 3.2 belongs with card 3.2. Version 2.6 stays available below.

⬇ digiWUFFUM 3.2
The program for Windows: unzip and start, nothing to install. The program is in Dutch.
Belongs with SD card 3.2 below.
File: … · …
STATUS: …
SHA-256: …
⬇ DOWNLOAD ZIP
⬇ SD card 3.2 for the SDR7020
All files for a FAT32 card, with the new transmitter and the FM receiver built in.
Unzip to an empty card, into the SDR7020, switch on.
File: … · …
STATUS: …
SHA-256: …
⬇ DOWNLOAD ZIP
⬇ MAC-adres.bat: two or more 7020s on one network
Every 7020 leaves the factory with the same MAC address (00:0a:35:00:01:22). With two on the same network, only one gets a connection. MAC-adres.bat gives a 7020 its own address, and can also set it back. The address then belongs to the board, with every program and every SD card.
Switch on only one 7020, start MAC-adres.bat, type the IP address and choose 1. After the restart it finds the 7020 again via pluto.local and shows the new IP address. Runs on a Windows PC. The program itself speaks Dutch: 1 = own address, 2 = back to standard, 0 = stop, j = yes.
File: … · …
STATUS: …
SHA-256: …
⬇ DOWNLOAD ZIP
Questions, or want to join in? Join the Telegram group. Visit the DigiNicam group
⬇ Previous version: digiWUFFUM 3.1
Does 3.2 not work well for you? Then you can go back with this. Program and SD card 3.1 belong together.
Program: … · …
SD card: … · …
SHA-256 program: …
SHA-256 SD card: …
⬇ PROGRAM 3.1 ⬇ SD CARD 3.1
⬇ digiWUFFUM 2.6
The program for Windows: unzip and start, nothing to install.
Belongs with SD card 2.6 below.
File: … · …
STATUS: …
SHA-256: …
⬇ DOWNLOAD ZIP
⬇ SD card 2.6 for the SDR7020
All files for a FAT32 card: Willem's Linux and FPGA design, with my clipper, channel filter and click fix built in.
Unzip to an empty card, into the SDR7020, switch on.
File: … · …
STATUS: …
SHA-256: …
⬇ DOWNLOAD ZIP
WINDOWS WARNS, AND THAT IS RIGHT

The program is not signed with a certificate; that costs a few hundred euros per year. So Windows does not know the maker and warns at the first start with Windows protected your PC. Click More info and then Run anyway.

If you want to be sure you have exactly my file: the SHA-256 checksum is shown with every download. In PowerShell you check it with Get-FileHash filename.zip.

GETTING STARTED

WHAT YOU NEED

TransmitterSDR7020 (Zynq 7020 + AD9363)
Audiostereo encoder with MPX output
I2SADC board 24 bit / 192 kHz
PCWindows 10 or 11, network to the SDR7020
Measuring (optional)second input of the SDR7020, or an RSPdx
Listening (optional, 3.x)DAC board with PCM5102A

FIRST TIME

1make the SD card and put it in the SDR7020
2connect the ADC board and the MPX
3unzip digiWUFFUM and start it
4fill in the IP, Verbinden (connect)
5transmitter on at -10 dB, watch the monitor
You are responsible for what you transmit. Only transmit on frequencies and with powers for which you hold a licence, and start testing into a dummy load. The program always starts the transmitter at -10 dB, whatever was set last time.

Thanks

Who made what. The FPGA design with the FM modulator is by Willem, PE1PCF. The Windows software digiWUFFUM, the clipper and the channel filter in the FPGA (card 2.3 and later) and the manual are by PE1PzN.

Thanks to Willem, PE1PCF, for the enormous amount of time he put into the FPGA design that all of this runs on.

Questions, or want to join in? Join the Telegram group. Visit the DigiNicam group